Example embodiments of the inventive concepts relate to semiconductor memory devices, and in particular, to three-dimensional semiconductor memory devices with improved operation characteristics.
In order to satisfy consumer demands for superior performance and inexpensive prices of semiconductor devices, it is desirable to increase the integration level of semiconductor memory devices. The integration level of two-dimensional or planar semiconductor memory devices is primarily determined by the area occupied by a unit memory cell. The integration of two-dimensional semiconductor memory devices is therefore greatly influenced by the level of a fine pattern forming technology. However, the extremely expensive process equipment needed to reduce pattern sizes sets a practical limit on increasing integration for two-dimensional or planar semiconductor devices.
To address this limitation, three-dimensional semiconductor memory devices having three-dimensionally arranged memory cells have recently been proposed. However, the production of three dimensional semiconductor devices is more complicated and costly compared to two-dimensional semiconductor memory devices. In order to make three-dimensional semiconductor memory devices suitable for mass-production, the process technology for manufacturing three dimensional semiconductor devices should provide a lower manufacturing cost per bit than two-dimensional semiconductor memory devices while maintaining or exceeding the level of reliability of two-dimensional semiconductor memory devices.